1. Field of the Invention
The present invention generally relates to limiting resistor heating in semiconductors by conducting heat to the semiconductor substrate by the insertion of multiple metal levels below the resistor, increasing the size of the inactive portion of the resistor, and capturing heat rising off the top of the resistor
2. Background
Thin-film resistors of several configurations are used in microelectronics circuits. Usually, these resistors are placed relatively close to the Si substrate, being made from diffusions, polysilicon, M1, and thin TaN, or other resistive film near M1. This placement has the advantage that heat can flow with relative ease to the Si through the relatively thin insulator layer upon which they are formed. Recently, there has been a demand for placing thin film resistors farther away from the substrate, for example, above four or five levels of metal. In this position, the insulator thickness below the resistor is much greater, and provides a substantial increase in thermal resistance, which materially affects the cooling rate of the resistor during operation.
In addition, the insulator layers themselves may be composed of low dielectric constant (low-k) or ultra-low dielectric constant (ULK) dielectrics, which often have a lower density and therefore a lower thermal conductivity than SiO2. The combination of increased thickness and decreased thermal conductivity cause the temperature of the resistor to be significantly greater for the same current than would be the case for the resistors fabricated near the Si substrate, and over conventional SiO2.
The temperature increase in the resistor has two deleterious effects: 1) damage to the resistor itself, and 2) enhanced electromigration damage in nearby metal lines that become hotter due to the resistor heating. For this reason, heating in the wiring levels is limited to 5 degrees C. (which is, nonetheless, roughly equivalent to a 25% decrease in lifetime). Hence, a larger resistor width must be used to meet the required current for a given circuit, and for these upper level resistors, that width can require costly chip area. Thus, some method for controlling the temperature of the resistor is needed to make the required devices smaller.
FIGS. 1A and 1B illustrate a semiconductor 100 having an Si semiconductor substrate 102, an M1 dielectric layer 104, an M2 dielectric layer 106, an M3 dielectric layer 108, an M4 dielectric layer 110, an M5 dielectric layer 112, a resistor layer 114, and an upper layer 116. Circuit wire elements 120, (shown on both sides of the semiconductor 100) are positioned within the layers M1-M5, 104-112, respectively. Cu or Al wires 122 lead to a refractory metal based resistor 124 located in a layer 114 above the M5 layer 112. The refractory metal based resistor 124 may include a refractory metal nitride such as TaN. A top view of a vertical footprint 126 of the resistor 124 is illustrated in FIG. 1B.
Multiple insulator layers M1-M5/104-112 below the resistor 124 create a high thermal resistance. Heat flow, illustrated by dashed arrow lines in a vertical downward direction in the general area and designated by reference number 130A, is impeded and the resistor heats up with relatively small current. Heat also flows upwards, illustrated by reference number 130B, and heats lines routed above the resistor 124, and heat flows into the contacting Cu (or Al) lines 122 heating them as well.
Compared to any resistors located above M1, resistors located high in the stack must operate at reduced current or else they will cause earlier metallization failure by EM and/or resistor damage from the elevated temperature. Furthermore, if the dielectric layers are composed of low-k or ULK insulator, the thermal conductivity is only a fraction that of oxide, compounding the problem. Current restrictions caused by heating constraints require larger resistor size to allow the same amount of current as is used for resistors at lower levels.